Limitations of the MOS Resistive Circuit in MOSFET-C Implementation: Bandwidth, Noise, Offset and Non-Linearity

Significant departures between predicted behaviour and actual performance are observed in opamp based structures containing the so-called MOS Resistive Circuit. In this paper we demonstrate that the usual description of this cell by a simple model of two tunable resistors is not adequate enough to properly describe the MRC operation. A more complete, still simple model is proposed and shown to work by means of some examples. The model is used to characterise and predict the effects that the limited gain and offset of the opamp induces in the MRC operation, increasing the distortion, the expected noise and the output DC offset, and reducing the bandwidth of the system. Finally we give some design guidelines for the optimum application of the MRC.